ACPI Flash BIOS version 1.80 for Satellite/Pro L300/L305/L350/L355



File: slb8v180.exe




Version: 1.80
 
Posted Date: 2009-04-28

 

Release Date: 2009-04-08

 

Other Versions

 

Package
WinRAR self-extracting ZIP file includes both Windows-based and diskette based BIOS update installation options. See the included documentation for details.
Description

Release Notes

  • BIOS 1.70 change points were combined with BIOS 1.80 change points. BIOS 1.70 was not released to the website.

    • Change History

      Version 1.80 - 2009-04-08
      • Updated: ICH9m Ref 2.0 chipset code.
      • Updated: Cantiga 2.5 Ref Code.
      • Updated the MRC code to 2.50.
      • Updated Brightness Table (LTN154AT10-T01, LTN154AT10-501).
      • Upgraded the BIOS CD file to FreeDOS bootable 2.88 floppy disk simulation.
      • Updated: MRC2.6 to fix a GL40 Rev A1 hang issue.
      • Fixed: Hitachi Panther-B HDD can't be detected.
      Version 1.60 - 2009-01-14
      • Update 4 DMI PSLB8E-0FY03K1G, PSLB9E-03201M1G, PSLB8EY0FY03K1G and PSLB9EY03201M1G for TEG.
      • Update 4 DMI for software interface with Toshiba Supervisor Registration and Boot priority utility.
      Version 1.40 - 2008-12-05
      • Fixed: Need to input the supervisor password to open HWSetup.
      • Fixed: Boot priority set to default setting after restarting when set to Compatibility mode.
      • Fixed: Set password in HWSetup with "Fn+0" can not be identified in SCU.
      • Updated the MRC to v2.30 for Intel Cantiga A1 stepping.
      • Fixed: Celeron processor can not control speed in the XP TPS application.
      • Fixed: When the system boots to a PXE-Linux Server, file downloads take a longer time.
      • Fixed: Audio has no sound in Vista SP1 64 bit when 4G memory is plugged in.
      • Added CRID Cantiga A1:09h.
      • Added support for the Silego clock generator.
      • Updated Cantiga 2.3 ref code.
      • Fixed: In Windows XP if the SATA Controller Mode is set to "Compatibility" then the Primary IDE Channel is set to "PIO Mode."
      • Save CRID value to CMOS bank1.
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